In the current state of the art, digital logic power-supply decoupling is achieved using decoupling capacitors. A digital logic device, due to its discrete nature, switches logic states between on and off. This digital switching causes transient currents to be generated, which must be supplied by the power distribution system. Typically, decoupling capacitors in proximity to the digital logic are used to supply the transient current. However, parasitic inductances are always present between the digital logic and the decoupling capacitor. These inductances react to changes in digital logic device current demand by producing voltages that impede the ability of decoupling capacitors to supply transient current to the digital logic. In simulations, it is apparent that this parasitic inductance is the prime limitation to the success of the decoupling capacitor in achieving its function—that of ensuring the power-supply voltage at the digital logic remains fixed at all times. Little has changed in the past 40 years, except incremental means of reducing the parasitic inductance between digital-logic integrated circuits and decoupling capacitors.
For the reasons stated above and for other reasons stated below which will become apparent to those skilled in the art upon reading and understanding the specification, there is a need in the art for improved systems and methods for current management for digital logic devices.